1. Field of the Invention:
The present invention relates to a signal generating circuit formed of field effect transistors and, more particularly to a dynamic type signal generating circuit formed in a semiconductor integrated circuit.
2. Description of the Related Art:
As signal generators employed in integrated circuits, a source-follower type dynamic signal generating circuit is widely utilized. This type of signal generator usually comprises a pull-up field effect transistor connected between a power voltage source (Vcc) and an output node and a pull-down field effect transistor connected between the output node and a ground voltage line. A first input signal such as a reset signal is applied to a gate of the pull-down transistor while a second input signal such as a drive signal is applied to a gate of the pull-up transistor. In a first period such as a reset period, the first input signal is made a high level to render the pull-down transistor conductive. As a result, the output node is set at a potential of the ground voltage line (ground voltage). Then, the first input signal is turned to a low level to make the pull-down transistor non-conductive and a second period is initiated. In the second period, the second input signal is made at a high level for a relatively short time so that the output node is charged approximately to the power voltage Vcc. After the pull-up transistor is turned non-conductive, the output node is maintained at the charged level near Vcc by stray capacitance of the output node in a dynamic manner in a third period after the second period.
However, in the third period, if noise is applied to the ground voltage line so that the potential at the ground voltage line is lowered below the ground voltage, the pull-down transistor is erroneously made conductive irrespective of the low level of the first signal because the pull-down transistor is forward-biased by the lowered voltage at its source electrode which is connected to the ground voltage line. Accordingly, the charge in the stray capacitance at the output node is erroneously discharged through the pull-down transistor to take a non-correct logic level. Thus, the operation of the conventional signal generating circuit is easily affected by noise and lacks reliability of logic operation.